1. Technical Field
The present invention relates to fabrication of integrated circuits, and in particular to methods of dry etching thin films of xe2x80x9cdifficult to dry etchxe2x80x9d materials such as Platinum, Iridium, Gold, refractory elements, transition elements, their alloys and/or compounds for the formation of structures in an integrated circuit.
2. Description of the Related Art
Plasma etching is widely used for the fabrication of microelectronic devices. In plasma etching, a wafer with a desired film to be etched is placed in a plasma environment. The reactive species (neutrals and ionized species) from the plasma react with the wafer surface material to form reaction products. The reaction products are readily removed from the wafer surface due to their highly volatile nature and are pumped away, thereby leading to etching (or removal) of the wafer surface material.
The wafer temperature is typically controlled in the less than 100 degrees C. range in conventional plasma etching, for various technological reasons. This is achieved by placing the wafer on a wafer electrode that is maintained at a desired temperature (e.g.,  less than 100 C). To facilitate the transfer of heat to or from the wafer, Helium gas pressure (or flow) is normally used on the back side of the wafer. The wafer must be clamped to hold the wafer in place during processing, to provide mechanical support to the wafer and to reduce the leakage of the Helium from the backside of the wafer to the plasma environment on the front of the wafer. Clamping is achieved either by mechanical means (using a mechanical clamp) or by using electrostatic force (using a electrostatic clamp or ESC). The wafer electrode is powered using a Bias Power supply to control the energy of ions bombarding the wafer surface.
Certain materials such as Platinum, Iridium, Gold and Copper, refractory and transition elements, their alloys and compounds do not dry etch readily in a plasma environment. This is due to the fact that these materials do not form highly volatile compounds under the conditions of conventional plasma etching. For the purpose of the discussion here, such materials are defined as xe2x80x9cdifficult to dry etch.xe2x80x9d
Attempts at dry etching these materials using physical etch conditions such as ion beam etching has been shown to result in problems. Due to the low volatility of the etch product species and their associated light sticking probability, significant amount of redeposition occurs leading to critical dimension growth or formation of fence like structures. Halogen containing volatile compounds of Platinum, Iridium, Gold and Copper, refractory and transition elements, their alloys can be formed in absence of a plasma in a purely chemical reaction at very high temperatures (for example  greater than 600 degrees C.). However, the use of heated wafer electrodes to heat the wafer to an elevated temperature ( greater than 200 degrees C.) has many disadvantages. Some of these disadvantages include the following:
(1) Since heated wafer electrodes are typically designed for elevated temperature ( greater than 200 degrees C.) service, the electrodes cannot be readily cooled down to conventional processing temperatures ( less than 100xc2x0 C.) in a short period of time (such as for use within a process recipe). As a result, a plasma etch chamber equipped with a heated wafer electrode is not compatible with other lower temperature ( less than 100 degrees C.) processes such as ARC open etch and hard mask open etch. A separate chamber must therefore be used for any additional etch processes that operate at conventional wafer temperatures.
(2) The materials of construction for the heated electrode must be chosen very carefully to be compatible with a high vacuum plasma reaction chamber. Thermal isolation of the electrode must be achieved in addition to electrical isolation from other parts of the tool. Due to the stringent design and operation requirements of the speciality materials, the electrodes tend to be expensive and add to the cost of the tool. In addition, an electrode that is heated to elevated temperatures of  greater than 200 degrees C. requires additional safety precautions and cool-down times for maintenance.
(3) Clamping and de-clamping reliability may be an issue for electrodes operating at elevated temperatures, especially for electrostatic clamps.
Therefore, a need exists for a method for dry etching xe2x80x9cdifficult to dry etchxe2x80x9d materials which employs electrode temperatures of less than about 100 degrees C. for an electrode equipped plasma etch chamber. A further need exists for a method for achieving high wafer temperature for dry etch processing of xe2x80x9cdifficult to dry etchxe2x80x9d materials.
A method for etching material which does not readily form volatile compounds in a plasma, in accordance with the present invention, includes providing a plasma etch chamber including a wafer electrode at an initial temperature. The wafer electrode supports a wafer, and the wafer includes a layer of the material which does not readily form volatile compounds in plasma. The wafer is bombarded with charged particles from a plasma generated in the plasma etch chamber to impart thermal energy to the wafer. A reactive gas flow is provided to react with etch products of the material. Bias power is applied to the wafer electrode to impart bombardment energy to the charged particles incident on the wafer from the plasma such that a predetermined temperature is generated on a surface of the wafer wherein the wafer electrode is maintained at about the initial temperature.
In other methods, the step of applying bias power to the wafer electrode may include the step of selecting the bias power to reach a predetermined temperature on the wafer of greater than 200 degrees Celsius. The method may further include the step of reducing heat loss from the wafer to the wafer electrode and to wafer surroundings. The step of reducing heat loss may include the step of substantially eliminating backside cooling of the water and/or reducing a clamping force to between about 0.1 pounds to about 0.0 pounds between the wafer and the wafer electrode. The initial temperature may be about room temperature. The predetermined temperature may be greater than about 300 degrees Celsius. The method may further include the step of etching the material to form interconnect structures in an integrated circuit. The step of etching the material to form capacitor electrodes in an integrated circuit may be included. The material may include at least one Platinum, Iridium, Gold, Copper, a refractory element and a transistor element. The step of providing the reactive gas flow may include the step of providing the reactive gas flow with halogens.
A method for plasma etching a layer of at least one Platinum, Iridium, Gold Copper, a refractory element and a transistor element, in accordance with the present invention, includes forming a hard mask on the layer for providing an etch pattern on the layer, the layer being formed on a wafer, providing a plasma etch chamber including a wafer electrode at an initial temperature, securing the wafer to the wafer electrode with a clamping force of substantially zero, bombarding the wafer with charged particles from a plasma generated in the plasma etch chamber to impart thermal energy to the wafer, providing a reactive gas flow including halogens to react with the layer to form etch products of the layer and applying bias power to the wafer electrode to impart bombardment energy to the charged particles incident on the water from the plasma such that a predetermined temperature is generated on a surface of the wafer while the wafer electrode is maintained at about the initial temperature, the predetermined temperature having a value sufficient to make the etch products volatile to react with the reactive gas flow.
In other methods, the step of applying bias power to the wafer electrode may include the step of selecting the bias power to reach a predetermined temperature on the wafer of greater than 200 degrees Celsius. The step of reducing heat loss from the wafer to the wafer electrode and to wafer surroundings by substantially eliminating backside cooling of the wafer may be included. The clamping force may be between about 0.1 pounds to about 0.0 pounds between the wafer and the wafer electrode. The initial temperature may be about room temperature. The method may further include the step of etching the layer to form interconnect structures in an integrated circuit. The method may further include the step of etching the layer to form capacitor electrodes in an integrated circuit.
A method for patterning platinum electrodes for stacked capacitors for dynamic random access memory chips, in accordance with the present invention, includes providing a wafer having a layer of Platinum formed thereon, patterning a hard mask on the layer of Platinum, securing the wafer to a wafer electrode in a plasma etch chamber, the wafer electrode being at an initial temperature, bombarding the wafer with charged particles from a plasma generated in the plasma etch chamber to impart thermal energy to the wafer, providing a reactive gas flow to react to form etch products of the Platinum and to etch the Platinum in accordance with the hard mask, and applying bias power to the wafer electrode to impart bombardment energy to the charged particles incident on the wafer from the plasma such that a temperature of greater than about 200 degrees Celsius is generated on a surface of the wafer wherein the wafer electrode is maintained at about the initial temperature.
In other methods, the step of reducing heat loss from the wafer to the wafer electrode and to wafer surroundings by substantially eliminating backside cooling of the wafer may be included. The step of securing the wafer to a wafer electrode may include the step of clamping the wafer to the wafer electrodes with a clamping force between about 0.1 pounds to about 0.0 pounds. The initial temperature may be about room temperature. The hard mask may include Barium Strontium Titanium oxide (BST). The reagent gas preferably includes halogens.